A study on highk metal gate stack mosfets with rare earth. Why is a metal used instead of polysilicon for highk gate. Sram with hkmg process has yielded, complements foundrys 3228nm technology hsinchu, taiwan, nov. Dual workfunction wf with an advanced high k metal gate hkmg stack is deployed in an integrationfriendly cmos process flow. The introduction of high k metal gate hkmg technology starting at the 45 nm node has put the industry back on the scaling path. High k gate dielectrics for future cmos technology t. By david lammers qualcomm cdma technologies said it will not use a highkmetal gate hkmg process for most of the chips it makes at the 28 nm node, sticking with a polysion gate stack. Pdf 2007 saw the introduction of the first highkmetal gate hkmg devices into the marketplace. Ma yale university, center for microelectronics, and department of electrical engineering new haven, ct 065208284 introduction high k dielectrics are being actively pursued by the semiconductor industry to replace sio2 as the gate dielectric for future generations of cmos transistors. Intel made a significant breakthrough in the 45nm process by using a high k hi k material called hafnium to replace the transistors silicon dioxide gate dielectric, and by using new metals to replace the n and pmos polysilicon gate electrodes. Dielectric breakdown in a 45 nm highkmetal gate process. In order to tune the work function, one or several metal layers are then deposited. Both provide twice the gate density of comparable 40nm processes and an sram cell size shrink.
The atom probe analysis of a full gate stack metal gate high k dielectric in a 3d finfet is reported. Role of highk gate dielectrics and metal gate electrodes. Intels first 45nm hafniumbased highk metal gate processors. Therefore, all the above high k materials are suitable with metal gate and compatible with silicon of transistor. In this study, this issue has been addressed in terms of a lowcost single wafer processing swp technique using a single tool for the fabrication of high. Pdf interface dipole engineering in metal gatehighk stacks. Vgs and b ids ds characteristics of nchannel right panel and pchannel left panel. Among the various technologies to tackle these problems, interface dipole engineering ide is an effective method to improve the performance, particularly, modulating.
The 28nm process technology is slated to become the foundation for a new. The measurement reliability in this kind of heterogeneous structure is discussed in the light of different artefacts, i. Reliability of advanced highkmetalgate nfet devices. As metaloxidesemiconductor fieldeffect transistors mosfets have decreased in size, the thickness of the silicon dioxide gate dielectric has steadily decreased to increase the gate capacitance and thereby drive current, raising device performance.
Device scaling ofhigh performance mosfet with metal gate. Trigate transistor architecture with highk gate dielectrics. The incorporation of high k dielectrics with metal gates into a manufacturable, high volume transistor process is the result of tremendous ingenuity and effort by many scientists and engineers 1. In transistor gate dielectrics, high k is desirable as it gives high performance with low leakage. However, for technology generations beyond 15 nm it will become very challenging for high k alone to provide sufficient shortchannel control. May 11, 2017 once youve replace the sio2 gate oxide with highk dielectrics hafnium oxide or zirconium oxide you band diagram is completely different. A system for monolayer photoassisted deposition was modified. Highkmetal gate article about highkmetal gate by the.
Nov 14, 2007 intel 45nm high k metal gate press release 1. A 22nm soc platform technology featuring 3d tri gate and high k metal gate, optimized for ultra low power, high performance and high density soc applications conference paper dec 2012. High k hk dielectrics are a solution to overcome these limitations. Nov 14, 2007 the main features of intels 45nm technology are the use of hfo2 as the high k dielectric material, tin for the nfet replacement gate, and tin barrier alloyed with a work function metal for the pfet replacement gate. The past, present and future of highkmetal gates citeseerx. The scaling of complementary metal oxide semiconductor cmos transistors has led to the silicon dioxide layer used as a gate dielectric becoming so. New materials for the gate stack of mostransistors. Although metal gatehighk stacks are commonly used in metaloxidesemiconductor fieldeffecttransistors mosfets in the 45 nm technology node and. Atom probe analysis of a 3d finfet with highk metal gate.
Hot carrier effect on gateinduced drain leakage current in. High performance 2220nm finfet cmos devices with advanced. The xps spectra of all studied low temperature plasma oxides show two main features fig. Since at the beginning of highk material development 61, highksi gate stacks also showed d it values of. The company described the rationale behind the strategy, which because of qualcomms size will have a major impact on the foundry business, at the 2010. Dualepitaxy and multiple stressors are essential to boost the device performance.
Once youve replace the sio2 gate oxide with high k dielectrics hafnium oxide or zirconium oxide you band diagram is completely different. The incorporation of high k dielectrics with metal gates into a manufacturable, high volume transistor process is the result of tremendous ingenuity and effort by many scientists and engineers. Silicon dioxide sio 2 has been used as a gate oxide material for decades. But the best choice is hfo 2 as dielectric of transistor. Designing into a foundry lowpower high k metal gate 28nm cmos solution. More recently, intel introduced in their 32nm technology a slightly different scheme where the high k is deposited last, right before the metal gate electrodes, and after the complete removal of the dummy gates. Intels solution to the problem was to combine a hafniumbased dielectric layer, instead of silicon dioxide, with a gate electrode composed of alternative metal. Advanced metal gatehighk dielectric stacks for high. Although a great deal of research has been conducting, many problems are still remained on high k metal gate stacks. The penryn processor debuted intels 45nm fabrication, and was the first to utilize highk gate dielectrics and metal gate electrodes.
This change in technology was significant for a number of reasons. A study on highk metal gate stack mosfets with rare. As elements in the chip were being reduced to 45 nanometers, the gate dielectric began to lose its insulating dielectric quality and exhibited too much leakage. Highk metal gate stacks with ultrathin interfacial layers formed by. In interconnects, low k is desirable as it leads to faster signal transmission times. Highkge mosfets for future nanoelectronics sciencedirect. Highk metal gate fundamental learning and multiv t options for stacked nanosheet gateallaround transistor. Also, using metal as a gate electrode mg, the polysilicon gate pg depletion effect is. Metal gate high k dielectric stack metal gate elect rodes may be more effective than polysi in screening the high k so phonons from coupling to the channel under inversion conditions, resulting in improved channel mobility 78. The present work addresses the investigation of high. Cmp solutions for the integration of high k metal gate.
The contents firstly include the deposition of zirconium dioxide and hafnium dioxide from the gas phase, using organometallic precursors. However, the use of high k metal gate require a ntype metal. Ald highk as a common gate stack solution for nanoelectronics. Manufacturable process and tool for high performance metal. Low k dielectric low k dieletrics are used to insulate onchip interconnects and should not be confused with the high k dielectrics. Enabling effective work function tuning by rfpvd metal oxide on high k gate dielectric article pdf available in ecs transactions 1 october 2008 with 314 reads how we measure reads. Off state leakage current related power dominates the cmos heat dissipation problem of state of the art silicon integrated circuits.
Although metal gatehighk stacks are commonly used in metaloxide semiconductor fieldeffecttransistors mosfets in the 45 nm technology node and. Pdf enabling effective work function tuning by rfpvd. Recent trend from topdown lithography to selfalignment and bottomup patterning approaches source. Illustrated guide to highk dielectrics and metal gate electrodes.
Using high k metal gate hkmg stacks can reduce the gate leakage and eliminate the poly gate depletion 37 38 39. Highk metal gate fundamental learning and multiv ieee xplore. Lowpower dramcompatible replacement gate highkmetal. In an rmg integration scheme, a polysi capped dummy gate stack is first deposited, featuring in a high k first scheme hkf, used in this work a sio 2 interfacial layer il high k stack followed by an etch stop layer esl. Gate first tialn p gate electrode for cost effective high k metal gate implementation. The high k gate oxide layer that intel implemented on the penryn was not compatible with a polysilicon gate electrode, so the change also meant further improvements in performance and reductions in current leakage due to the more efficient way in which the metal gates transfer current. Among the various technologies to tackle these problems, interface dipole engineering ide is an effective method to improve the performance. C onclusion 46, 69 nmos structure with 18nm were successfully designed and stimulated to study the various of dielectric materials on metal gate of device performance. In this work the combination of ultra thin high k gate dielectric, near midgap metal gate workfunction, low doping in the channel and optimized fin dimensions enable us to fully enhance. The evolution of highk metal gate transistors, from the first planar 45nm to the latest 14nm node.
With a high k material as gate dielectric, effective oxide thickness eot can be further scaled down without increasing gate tunneling leakage. Gaas substrate for epitaxial growth remote doping layers high electron mobility insb quantum well higher bandgap matrix al xin 1xsb for reduced junction leakage metamorphic alinsb buffer layer source. The contents firstly include the deposition of zirconium dioxide and hafnium dioxide from the gas phase, using organometallic precursors, and their physicochemical characterization. Interface dipole engineering in metal gatehigh k stac ks. High performance 32nm logic technology featuring 2nd. Role of highk gate dielectrics and metal gate electrodes in. Although metal gate high k stacks are commonly used in metal oxidesemiconductor fieldeffecttransistors mosfets in the 45 nm technology node and beyond, there are still many challenges to be solved. This marked the return of metal gate technology on silicon for the first time since polysilicon gates.
Interface dipole engineering in metal gatehighk stacks springerlink. However, it became clear that there was a reaction. The trigate transistor architecture introduces the fewest changes to conventional planar transistor processing. From this study, we find the suitable combination materials between the highk and metal gate, and how it is a good affected on the electrical. After the high temperature sd and silicide annealing cycles, the dummy gate was removed and metal gate electrodes were deposited last. This achievement is a first keystep in demonstrating technology. Pdf highkmetal gates in leading edge silicon devices. These new materials along with the right process recipe reduced the nmos gate leakage by 25x and pmos. As metal oxidesemiconductor fieldeffect transistors mosfets have decreased in size, the thickness of the silicon dioxide gate dielectric has steadily decreased to increase the gate capacitance and thereby drive current, raising device performance. High kmetal gate the technology in an intel chip that enabled the fabrication of 45 nm microprocessors in 2007. Chau and colleagues explained the problem that led to the use of a metal gate in detail in highkmetalgate stack and its mosfet characteristics, ieee electron. A 32nm logic technology featuring 2ndgeneration highk.
A 250nm thick tetraethylorthosilicate teos oxide was deposited. Highkmetal gate the technology in an intel chip that enabled the fabrication of 45 nm microprocessors in 2007. Pdf gatefirst tialn pgate electrode for cost effective. Iedm 2009 17 key device features y30nm gate length with 112. Evolutionary search for new highk dielectric materials. Pdf in this work, we report the use of aluminum ion implantation to modulate the threshold voltage for hfbased high k tin metal gate pmos finfets. However, the use of high k metal gate require a ntype metal and a ptype. The socalled gatefirst metal inserted polysi and gatelast replacement metal gate approaches have both pros and cons, as summarized in fig. Illustrated guide to highk dielectrics and metal gate. Although metal gate high k stacks are commonly used in metal oxidesemiconductor fieldeffecttransistors mosfets in the 45 nm technology node and beyond, there are still many challenges to be. Interface dipole engineering in metal gatehighk stacks core. Highk materials and metal gates for cmos applications. The main features of intels 45nm technology are the use of hfo2 as the high k dielectric material, tin for the nfet replacement gate, and tin barrier alloyed with a work function metal for the pfet replacement gate. The remaining gate space is filled with aluminum and excess is polished away to leave a finished high k metal gate transistor.
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